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Freelance FPGA designer needed

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eozalp

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Hello,

I am looking for a freelancer FPGA designer to do the following project.
Please contact me if you are interested (eozalp@baran-tech.com) .

Job description:
-------------------------------
We want to protect our IP cores, targeting Xilinx FPGAs, by using a
1-Wire EEPROM with SHA engine.

It is explained in Xilinx application note xapp780 how it can be made.
The vhdl source codes as well as picoblaze processor source codes for
the xapp780 can also be downloaded from the Xilinx website.

The problem is that the xapp780 is for DS2432 EEPROM from Maxim IC.
However, I want to use DS28E01-100 EEPROM instead. I compiled the
sources but the design is not working with DS28E01-100 EEPROMs.

Some more points:
1 - You have to change the xapp780 sources so that it it works with
DS28E01-100 EEPROM.
2 - We need 2 designs as it is in xapp780, loader and tester. Loader
programs the EEPROM with our security key.
Tester checks if the SHA keys are matching.
3 - Target FPGA is XC3S200AN. So you must have a Spartan 3A or 3AN
evaluation kit.
4 - We use the big SFN package with 2 pins. Therefore it is very easy to
connect the evaluation kit with the EEPROM through 2 cables. We will
also provide some EEPROMs for testing.
5 - You will deliver me the complete source codes
6 - You can download only a restricted version of DS28E01-100 from Maxim
website. You must sign an NDA to get the complete datasheet.
 

Re: FPGA designer needed

Hello,

Where are you located?
 

Re: FPGA designer needed

Hallo,
I am located in Germany, but this project can be made remotely.
 

Hi,
i can,my email:szfpga@gmail.com
 

Hi, I had a lot of fgpa design experience and currently working in a fpga company. I can help you on the project. Feel free to contact me at cherjier@Gmail.com
 

I have the Spatan III evaluation kit. I can do the job remotely. But i need more detail. My email is ... . Feel free to contact me.
 
Last edited:

What is the exact problem of the board? "It doesn't work" are general. Which error do you detect? Until which step it is true?

Could you describe more?
 
Last edited:

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