Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Error (10430): VHDL Primary Unit Declaration error at reg_four.vhd(5): primary unit "

Status
Not open for further replies.

fanwel

Full Member level 3
Joined
May 26, 2011
Messages
178
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,298
Activity points
2,878
Error (10430): VHDL Primary Unit Declaration error at reg_four.vhd(5): primary unit "

Hi all;

I have problem, where I write a main code that includes a fixed_pkg that I declare as a package of "my_data_types". Then I add project (another code) which also include a fixed_pkg as a component of the main code. When I compile the main code, this error occur:

Error (10430): VHDL Primary Unit Declaration error at reg_four.vhd(5): primary unit "my_data_types" already exists in library "work"

I debug by delete the package declaration for the component code. But then, error will say that the "sfixed_array_t" is use but not declare.
Why this happen..need helps..thanks
 

it sounds like you're trying to create my_data_types package twice.
 

Yes you right, thanks TrickyDicky
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top