Dan_Yang
Newbie level 5
Hi,
I learned there are 2 ways to read designs when we do floorplan.
1. read_verilog...
2.import_designs ... ddc ..
I wonder (1)What's the difference between these two ways?
(2) initial floor plan info generated from DCT is contained in ddc, is it also contained in verilog?
So many thanks!
I learned there are 2 ways to read designs when we do floorplan.
1. read_verilog...
2.import_designs ... ddc ..
I wonder (1)What's the difference between these two ways?
(2) initial floor plan info generated from DCT is contained in ddc, is it also contained in verilog?
So many thanks!