Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Compareing two clocks in VHDL

Status
Not open for further replies.

rnpatil

Newbie level 1
Joined
Dec 14, 2008
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,285
Hello
can anybody help me to give logic for vhdl code, which will compare two frequencies say f1 and f2 and also their phase, and giving o/p based on the comparison.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top