CLOCK_SIGNAL constraint

[kuntul]

I am getting the following warning in my synthesis report:

Clock Information:
------------------
-------------------------------------------------------------------------------+-------------------------------------+-------+
Clock Signal | Clock buffer(FF name) | Load |
-------------------------------------------------------------------------------+-------------------------------------+-------+
Clk | BUFGP | 27 |
LCDClkDiv_0/ClkOut1 | BUFG | 1398 |
singlecycle/Controller/Beq_not0001(singlecycle/Controller/Beq_not000176:O) | NONE(*)(singlecycle/Controller/Bgtz)| 3 |
singlecycle/IM/Display_cmp_eq0000(singlecycle/IM/Display_cmp_eq0000_wg_cy<7>:O)| NONE(*)(singlecycle/IM/Display) | 1 |
-------------------------------------------------------------------------------+-------------------------------------+-------+
(*) These 2 clock signal(s) are generated by combinatorial logic,
and XST is not able to identify which are the primary clock signals.
Please use the CLOCK_SIGNAL constraint to specify the clock signal(s) generated by combinatorial logic.
INFO:Xst:2169 - HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems.

I have a combinatorial logic that takes the Clk from the board and slows it down by a factor of 1250, basically a clock divider.

Based from reading the manual in verilog I have put the following code in my top module:

// synthesis attribute clock_signal of ClkOut is "yes";

Where ClkOut is the output from the ClockDivider I have. However I am still getting the same results as above...

In the synthesis report it says that I have set the property "CLOCK_SIGNAL = yes" for signal <ClkOut>

Another weird thing is that the controller is not taking any Clk as input, so why is it saying that:

singlecycle/Controller/Beq_not0001(singlecycle/Controller/Beq_not000176:O) | NONE(*)(singlecycle/Controller/Bgtz)| 3 |

is related to the clock