Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

about ADC measurement ! Why used 'Bias T' ?

Status
Not open for further replies.
Y

yeo

Newbie level 2
Joined
Feb 14, 2009
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,291
adc measurement

I designed 7bit Folding Interpolation ADC with 1.2V 65nm 1P6M process.
and I'm going to prepare mesurment.
I used input track and hold amplifier.


this picture show measurement setup
Why used 'Bias T' ?? :|


 

about ADC measurement !

To add a DC bias to the input signal.
 

Re: about ADC measurement !

why add DC voltage to input signal ?
and I can't understand that connected bias T to input clock.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top