About the INL and DNL test of 11-bit pipeline ADC!

HI all

I am testing a 11-bit ADC INL and DNL. I have read the maxim histogram test app

note. But I have some questions about the test setup.

1) For 11-bit and 27MHz sample clock, how to add the input sinwave signal. what the

frequency of the sinewave signal. How can i guantee the sampling chance for every

code is equate. How much time should i do the test(that is how much sample points total).

2) How to define the sivewave amplitude. how to consider the cliping? what meaning of the clipping?

Thanks!

you could find a good document on testing ADC at the following link

**broken link removed**

It refers to the "IEEE Standard for Terminology and
Test Methods for Analog-to-Digital Converters"

The document describes details like how to select the frequency of input signal,what should be no of samples etc..

thanks activeckt for your help!
Can you or anyone else upload this document for me?
I can't access it!
Thanks very much!

IEEE standard for terminology and test methods for A/D conv

the file has already been posted... you can get it here...

Thanks for all your help!
From the maxim app not, i can get the recorded sample point numbers Nrecord.
how to think of the Nrecord? Does it mean that i have sample Nrecord point datas from -vi to vi, here vi means the apmtitude of sinewave. So if the clock frequency is 27meg, then the sinewave period cycle is (1/27)*Nrecord*2? Is this correct?
If it correct, than the ADC input should be only half period cycle long?
Another idea is that i choose a sinwave frequency(much lower than 27meg,but not subfreq of clock). than oversamples. Also get Nrecord points.But how can control the sample point numbers?
Which method is ok?
Another question what's the mid_code meaning?And how can i get it ?
Can someone give me the detail?
I have to hurry up to do the test.
Thanks your help again!

no help?