wael_sharkasy
Newbie level 5
asix ax88796
Hi all,
I really need someone help.
I am in my final project and a part of it deals with implementation of a driver for Ethernet chip AX88796 -from Asix that is found on xstend board v.3 from XESS- by VHDL using FSM and ASM.
When i have finished ,I tested it by simulation and it successfully works but when i tried to download the design on my 3cs1000 FPGA,nothing works and i didn't get any response from the chip.
So if any one have tried this implementation and faced a similar problem , please tell me.
Also if any one have a simple sequence for testing the chip especially for its read and write operation please send to me.
Also if any one can tell me the steps of read timing diagram in points in case of 8051 interface as i get conflicted with what in the datasheet between what is drawn and what is written.
Finally,please reply to me as fast as you can as i am supposed to submit my project before the end of the week.
Thanks in advance.
yours,
Wael M. El Sharkasy
Hi all,
I really need someone help.
I am in my final project and a part of it deals with implementation of a driver for Ethernet chip AX88796 -from Asix that is found on xstend board v.3 from XESS- by VHDL using FSM and ASM.
When i have finished ,I tested it by simulation and it successfully works but when i tried to download the design on my 3cs1000 FPGA,nothing works and i didn't get any response from the chip.
So if any one have tried this implementation and faced a similar problem , please tell me.
Also if any one have a simple sequence for testing the chip especially for its read and write operation please send to me.
Also if any one can tell me the steps of read timing diagram in points in case of 8051 interface as i get conflicted with what in the datasheet between what is drawn and what is written.
Finally,please reply to me as fast as you can as i am supposed to submit my project before the end of the week.
Thanks in advance.
yours,
Wael M. El Sharkasy