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Problem with VCO simulation

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analogdude

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Hi,
I am presently designing a differential delay cell VCO which is based on symmetrical load and replica bias. (Its a 5 stage VCO)
O/P of the amplifier is used as a bias for PMOS load and Control voltage from LPF is used to control the tail current of delay cells. (Single NMOS as a tail device. No cascoding)

I am trying to simulate my VCO in transient mode by varying the control voltage from 1V to 2.5V over a period of 50us. My problem out here is VCO is not oscillating (i.e, VCO O/P is fixed at 2.8V :-()....

My question is, AM I going in the correct direction with the simulation of VCO in transient mode?

Some info about the simulation setup....
VDD = 3.3V (0.35um technology)
Vref to Amp --> 2.3V (assuming my delay cell swing is from 2.3V to 3.3V. I am using NMOS as I/P devices in delay cells)
Vctrl varying from 1V to 2.5V in 50us
Amp O/P varying from 2.35V to 1.3V
I am doing this simulation to find out the frequency range for control voltage range from 1V to 2.5V
 

did u put the inital condition , it make the oscillator simulation converge better , sometimes use the VDD as a step source not just a DC source

what is the tools u use in the simuation ?

khouly
 

Khouly,
Yes I tried with both the options (with and without initial condition).Also, I am using VDD as a step (with a rise time of 1n and transition from 0 to 3.3V).

My doubt is, will this be a problem with PMOS load (say load is less than expected)..... I have done the individual delay cells by taking a swing of 1V (2.3V to 3.3V) and current of around 120uA (calculated based on equation given in Razavi Book).

I am using Spectre for simulations
 

Do you connect the five stages in a negative feedback mode?

You can also intentionally mismatch the osc positive and negative node.
 

analogdude said:
Khouly,
Yes I tried with both the options (with and without initial condition).Also, I am using VDD as a step (with a rise time of 1n and transition from 0 to 3.3V).

My doubt is, will this be a problem with PMOS load (say load is less than expected)..... I have done the individual delay cells by taking a swing of 1V (2.3V to 3.3V) and current of around 120uA (calculated based on equation given in Razavi Book).

I am using Spectre for simulations

Sometimes the method of integration used by the simulator could introduce what is called "Artificial numerical damping", to avoid this issue, in the transient simulation options of spectre u will find INTEGRATION METHOD PARAMETERS, choose the "traponly" method.
 

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