analogdude
Newbie level 2
Hi,
I am presently designing a differential delay cell VCO which is based on symmetrical load and replica bias. (Its a 5 stage VCO)
O/P of the amplifier is used as a bias for PMOS load and Control voltage from LPF is used to control the tail current of delay cells. (Single NMOS as a tail device. No cascoding)
I am trying to simulate my VCO in transient mode by varying the control voltage from 1V to 2.5V over a period of 50us. My problem out here is VCO is not oscillating (i.e, VCO O/P is fixed at 2.8V :-()....
My question is, AM I going in the correct direction with the simulation of VCO in transient mode?
Some info about the simulation setup....
VDD = 3.3V (0.35um technology)
Vref to Amp --> 2.3V (assuming my delay cell swing is from 2.3V to 3.3V. I am using NMOS as I/P devices in delay cells)
Vctrl varying from 1V to 2.5V in 50us
Amp O/P varying from 2.35V to 1.3V
I am doing this simulation to find out the frequency range for control voltage range from 1V to 2.5V
I am presently designing a differential delay cell VCO which is based on symmetrical load and replica bias. (Its a 5 stage VCO)
O/P of the amplifier is used as a bias for PMOS load and Control voltage from LPF is used to control the tail current of delay cells. (Single NMOS as a tail device. No cascoding)
I am trying to simulate my VCO in transient mode by varying the control voltage from 1V to 2.5V over a period of 50us. My problem out here is VCO is not oscillating (i.e, VCO O/P is fixed at 2.8V :-()....
My question is, AM I going in the correct direction with the simulation of VCO in transient mode?
Some info about the simulation setup....
VDD = 3.3V (0.35um technology)
Vref to Amp --> 2.3V (assuming my delay cell swing is from 2.3V to 3.3V. I am using NMOS as I/P devices in delay cells)
Vctrl varying from 1V to 2.5V in 50us
Amp O/P varying from 2.35V to 1.3V
I am doing this simulation to find out the frequency range for control voltage range from 1V to 2.5V