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STAR topology or daisy chain.

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khaila

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star topology taglog version

I have 4 SD-RAMs that is supposed to be connected to FPGA.
my questions:
1. what is preferred? STAR or daisy-chain?
2. how I do route the shared data/address bus?
3. which termination resistors I nee??? where I should place them?
 

star toplogy

for data siganals point to point routing is prefered.

2)for address and control signals star star toplogy is prefered.....

3)try to route data and adress signals in diffrent layers.
 

star topology pdf

if you use SDRAM (NOT DDR), up to 80-100MHz, then you dont have too much problems. you have to keep all your signals between minimum and maximum length. its a synchronous system. practically Lmin is negative for SDRAM, so Lmax is what you have to calculate.

if you use 133MHz SDRAM,its about the higher limit of synchronous systems on PCBs, because of the:
-synchronous architecture, (needs short traces)
-slow output puffers,
-big components dont let you to to make very short traces, but the max trace length decreases at higher freq.

On old Pentium3 design guides, they describe very well practical routing of SDR.
I used daisy-chain always for SDR.

After layout, make a timing analysis! Or before, to determine length rules.
Terminations: most of the cases, its not even needed, some designers put 22 ohm series res at the processor. Simulate with hyperlynx, and if there is a lot of ringing, use the resistors. (4-pack)

trace separation should be grather or equal than 1*dielectric_thickness, at 100MHz. for less crosstalk. 1.5 is better for a longer bus.
 

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