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About low noise opamp design!

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colinwang

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If a low noise differential input op amp is needed in a circuit, what methods should I use or what should I do when I design it? What I know is that use the PMOS as the differential pair instead of NMOS and make the first stage gain as high as possible. What else? like which kind of topology should be used and so on? We can only use MOSFET here.
Could anyone be please to give some advices?
Thanks!
Regards![/b]
 

hi!

use low currents as possible. try 1mA. this in turn also increases the gain. are you doing the full layout? any topology is fine. layout technique can also help reduce noise.

- al
 

The equivalent input-referred noise voltage actually scales down with increasing gm (high current). So, you actually want the bias current of your input pair to be as high as possible.

You want to make sure that your input devices are the main noise contributors, so in that sense, you are right about high gain in the first stage, but don't overdesign it.
 

and use long-channel length to knock down
the 1/f noise.
 

For low frequency noise, meaning 1/f noise: BJTs typically have better performance, but if you have to use CMOS, often a PMOS input stage is best. Big input devices also help this. There are also some circuit techniques to deal with low frequency noise such as autozeroing, chopper modulation, CDS, etc..
For wideband (thermal) noise, as was mentioned above, you want to burn a lot of power to reduce the noise -- but you have to burn 4x more power to get a 2x reduction in noise...
 

if you want to reduce 1/f noise, two techniques can been thought of--chopper and auto-zeroing.
 

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