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Floating point adder/subtracter

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sadid

sadid

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Hello my friends
I want to design a floating-point adder/subtracter circuit:
I know the Algorithm (e.g: Computer Architecture,M.Mano,3rd Ed,Pritice-Hall page:359) but I have problem with the hardware implementation of the algorithm :cry: :
which IC :?: (74Series is better) and how?
it's Algorithm has too Decision blocks and a bit too hard for me to design a circuit .............. I'm beginner {I googled before without suitable result}

best regards!
 

Is this a student educational project? Are you required to use old 74xx parts? That's a lot of wiring, and the logic won't run very fast.

Instead, how about designing the logic in Verilog or VHDL, and then implement it in an FPGA? You can buy a nice little FPGA development kit for about $100 to $150 US.
 

Thank You echo47
yes I'm a student but I am already do this for my Computer arch. Lab at first i must implement it with some simple IC's like shift reg. and 4bit full adder (TTL or CMOS :74 or 45)
 

This is the picture of floating-point addition/subtraction algorithm I want to implement this with some Register and F.A ,.... (not with programming a Micro or FPGA) any suggestion?

Added after 5 hours 55 minutes:

OK friends I did something now for a real hardware Implementation or design it in schematic software I want to know about these ICs if possible:

1/4bit comparator (compare AR & BR 4bit registers)
2/Shift-Reg. with INC,Reset,shr,shl,EN(enable)
3/Flip-Flop with En pin
4/Adder & Subtracter (I have found 7483 what about better one?)
 

What is the format you are targetting IEEE 16 or 32 bits?
The components depend on the this spec.


Your algo is not visible --
 

I checked it again it work refer to this

-----------------
at last I designed the circuit with many simplicity supposition
 

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