Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

What do the simulators do when elaborating a design?

Status
Not open for further replies.

JesseKing

Advanced Member level 4
Joined
Nov 12, 2004
Messages
100
Helped
3
Reputation
6
Reaction score
1
Trophy points
1,298
Activity points
838
And what is the relation of elaboration and compilation?

Thanks and regards!
 

JesseKing said:
And what is the relation of elaboration and compilation?

Thanks and regards!

One quick way is to think of like compile and link of a C compiler/linker. Compile builds one module information at a time and the elab/link actually stitches them together and builds the full chip model.

Regards
Ajeetha, CVC
www.noveldv.com
 

aji_vlsi said:
JesseKing said:
And what is the relation of elaboration and compilation?

Thanks and regards!

One quick way is to think of like compile and link of a C compiler/linker. Compile builds one module information at a time and the elab/link actually stitches them together and builds the full chip model.

Regards
Ajeetha, CVC
www.noveldv.com

so the elabration is just as linking, isn't it ?
 

Hi JesseKing,

In fact you are right. Elab is like link the design. During complie syntex are cheked and binary database of each moule is build.
During elab all modules are linked...:|
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top