does anyone have the C++ code for DES or simplified DES
how to design a switchable capacitor bank in cadence virtuoso???
i am designing a boost converter analog controller using P&O technique
i need an analog circuit works as accumulator instead of integrator ... because the integrator slop changes...
can we draw a quarter circle using equation based surface option in HFSS?
if yes then how ??
Kindly help mee :cry: , will be thankful:smile:
I designed a Half H bridge by a HVIC switching circuit, but I encountered some problems.
This is my schematic.
The circuit is working perfectly when I applied the VDD below...
How can I replace a NMOS & PMOS by a N-QDGFET & p-QDGFET to design a CMOS inverter in cadence?