Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Explain the Charge Sharing problem while sampling data from a Bus

Status
Not open for further replies.

gafsos

Full Member level 3
Joined
Feb 1, 2006
Messages
189
Helped
25
Reputation
50
Reaction score
11
Trophy points
1,298
Location
North Africa
Activity points
2,450
What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus
TNX
 

charge sharing in bus

Say that the bus carries a single bit a certain value, to read this value, you're going to connect the input of another circuit to the bus via a switch.

Let's assume that the value on the bus is one and has a known capacitance associated with it. And also assume that your input circuit has a known parasitic cap at its output and its initially discharged.

The instance you're going to connect the two caps together, charge from the bus will go to the input parasitic cap, until both caps have the same potential. If you apply the law of charge conservation, you can predict how much drop to expect on the data bus.
 
Re: Charge sharing

jonashat said:
Say that the bus carries a single bit a certain value, to read this value, you're going to connect the input of another circuit to the bus via a switch.

Let's assume that the value on the bus is one and has a known capacitance associated with it. And also assume that your input circuit has a known parasitic cap at its output and its initially discharged.

The instance you're going to connect the two caps together, charge from the bus will go to the input parasitic cap, until both caps have the same potential. If you apply the law of charge conservation, you can predict how much drop to expect on the data bus.
Would you please explain it with an example, I am still confused about this concept, there are so many "input"s and "output"s in your explanation above.
 

Charge sharing

Well, the bus reading isn't the best example.

but in general, the problem happens when a capacitor is holding an output value is connected to another (usually parasitic) capacitor, the voltage stored on the main cap is now shared between the two, which leads to changing the value of the logic.

Here is one explanation that I found, it should be good enough to explain the concept.
h**p://www.princeton.edu/~wolf/modern-vlsi/Overheads/CHAP4-5/sld006.htm
 

Re: Charge sharing

due to diff voltages on capacitor of diff size when connected to the same bus for short period of time a prob is come that is know charge sharing
 

Re: Charge sharing

"Charge sharing"
Can you explain your question more exactly?

Regards,
SAZ
 

Re: Charge sharing

i didnt get u on charge sharing in a bus......plz elaborate on it..........
 

Re: Charge sharing

In Razavi's book,figure 12.19,12.22
there are two examples about charge injection and clock feedthrough.
Are they the charge sharing ?
 

Charge sharing

If it's digital bus, there are pull-up resistor to the supply. so the charge sharing is not a problem.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top