evi
Junior Member level 3
cmos pnp
Has anyone used or have any papers/info on a lateral PNP in TSMC 0.18 or 0.25u? Optimum layout, models? What is the realistcly achievable beta?
Has anyone used or have any papers/info on a lateral PNP in TSMC 0.18 or 0.25u? Optimum layout, models? What is the realistcly achievable beta?