mitgrace
Full Member level 6
Dear All :
I design a 0.13um LNA design , The Band is about 100MHz. Now I meet some questions about linearity (P1dB) . MY Design P1db is about -20dBm. But the specific is about -10dBm, How can I imporve it ? My design inlcude high ? low gain. Do I need to care the P1dB is the high /Low gian, Or just foucs on Low gain stage. Aother questions, If I want to do balun in the chip, the CS+ CG is only choice ?? Thanks
I design a 0.13um LNA design , The Band is about 100MHz. Now I meet some questions about linearity (P1dB) . MY Design P1db is about -20dBm. But the specific is about -10dBm, How can I imporve it ? My design inlcude high ? low gain. Do I need to care the P1dB is the high /Low gian, Or just foucs on Low gain stage. Aother questions, If I want to do balun in the chip, the CS+ CG is only choice ?? Thanks