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about FIFO,uses LFSR/Gray for read/write pointers

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sevid

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hi,all
in my memory,the read and write pointers used in FIFO are sequential data which are always implemented with counters.
but someone said generally a FIFO is addressed with LFSR(linear feedback shift register) or Gray code read/write pointers.
my questions are:

1.as the address of FIFO must read/write sequentially,why the out-of-order data generated by the LFSR or Gray methodology can serve as the address of FIFO.

2.i know that Gray code address can solve or decrease the metastability,what's the advantage when we use LFSR address.

thanks
sevid
 

Address generation using LFSR is less expensive than address generation using counters. LFSRs generate address in random sequence but in a unique order, which depends on the initial seed value. If we use same seed value for read address generator and write address generator, the reading sequence will be same as that of writing sequence.
As long as we are able to access same sequence of locations (during write & read), we really donot care if the locations in the sequence are consecutive or random.
 

Refer the folowing pdf..
 

Attachments

  • async_fifo_2087.pdf
    120.8 KB · Views: 154

I do not have enough points to view the attached document, so please let me know, what it says.
 

You only need gray acounter if the FIFO is asynchronous. If not just use regular ones. same thing less hassle
 

grey code is enough for fifo design.
note: you must resigter the grey encode pointer
 

Gray counters are used for incrementing pointers in asynchronous fifo. These pointers hold the value of the address .In asynchronous fifo as the read and write clocks operate at different frequencies using gray counters makes it stable as only one bit change at the transition of the clock.
 

the read write pointer change bineray code to Gray code .
but the comparition logic such as full empty flag generation will change the gray code back to bineray code .
 

I would like to add one more point here that even with the Gray code there is a limitation. Beacuse if the clock frequencies are >2X then gray code will change twice in the capture domain and will cause probelms.
 

hi,funzero
what you said sounds interesting,but i donot really understand it,would you like to give an example and explaint it to us?we'd very much appreciate your help.

sevid
 

bansalr said:
I would like to add one more point here that even with the Gray code there is a limitation. Beacuse if the clock frequencies are >2X then gray code will change twice in the capture domain and will cause probelms.
Click to expand...

Disagree.

By using grey code, only 1 bit will suffer from meta-stable issue at a certain capture clock edge. So changing twice or more is not a real issue, although it will lead to a more pessimistic result while capturing the async pointer.
 

wangkl
I disagree with ur argument. If the grey code is changed twice or more than definately the capturing clock will not differ in one bit but more than a bit.
 

bansalr said:
wangkl
I disagree with ur argument. If the grey code is changed twice or more than definately the capturing clock will not differ in one bit but more than a bit.
Click to expand...

Yes, the result will be different more than 1 bits.
But what's the problem, if the result is different 2 bits or more?

Even 2 bit or more, it only will lead to a more perssimitic synced fifo pointer.
what else?
 

Agree , Even with 2 bit or more change, Gray encoding will only lead to a more perssimitic synced fifo pointer.

Can we use LFSR, for that? Though i have never used it, but as per the comment by bh_letters

can anyone who have used LFSR shed some light on this?
 

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