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What does this "dual gate" mean?

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sophiefans

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PURPOSE
This is a document which provides necessary information on the topological layout rules to generatemasks for Chartered Fab2’s 0.35um ANALOG & LOGIC, salicide and polycide, baseline and dual gate(3.3V/5V) , retrograde-well, five-layer, four- layer, three-layer or two-layer metal technologies. Flexible
plug-in analog modules include high/low sheet rho poly resistors, MiM capacitor, interpoly capacitor andmulti low Vt transistors.
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Chartered Semiconductor Manufacturing 0.35 μm CMOS process employs 3.3V or 3.3V/5V, two, three ,four, five-layer-metal digital technology. Not all of these layers are drawn directly. Therefore it is important to define properly 。
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The words above is copied from Design rule of Charter. I am just wandering what the "dual gate" mean?

1、there is only one type voltage on chip, 3.3v or 5v
2、there are two type voltage on chip, 3.3v and 5v

Which one do you think?
 

Could someone give me some advice?

Thanks
sophiefans
 

My guess is that chartered has two standard cell libraries for .35um. 1 being 3.3V and the other being 3.3V/5V. Of course timing will be different between the two libraries..

jelydonut
 

My guess is that chartered has two standard cell libraries for .35um. 1 being 3.3V and the other being 3.3V/5V. Of course timing will be different between the two libraries..

But can we use 5v as the power supply? If can't. Why not?
 

I cud not get all this.
can anyone explain me more clearly about this thing.
 

Only the 3.3V/5V could handle a 5V vcc. Never tried it, but i assume running a 3.3V part at 5V would kill it. I do know running a 5V part at 120V AC definatly kills the part! :eek:)

Also, I could be wrong about the first comment, and they could have 2 different processes (layer thickness, etc) for that technology node. So you would specify the process you with to use, using the library for that process.

If you need a 5V vcc then you will have to use the 3.3V/5V process.

jelydonut
 

I believe you have two transistor types. The 5V transistor will have a thicker gate oxide than the 3.3V device.
 

dual gate just means that you can have on the same die(mix) 3.3V circuitry with 0.35um gate length and 5V circuitry with probably 0.5um gate length. To draw it you have to use different layers to define where the hi-voltage gates are.
Also digital libraries will be different - 3.3V and 5V
 

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