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What is the SAR ADC design flow?

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KKramer2000

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HAI ALL, can someone tell me about the SAR ADC DESIGN FLOW. I HAVE SEEN EXAMPLE of control logic unit in SAR in Tanner but the circuit is too complex to built using schematic(full custom). I cant find other ckt in ttech paper as people do not show the complete ckt . is it true if i assume that the logic unit was synthesize from FRONT end tool such as Synopsys etc....
 

sar adc design flow

if you know exactly the method,you can design it easily using full-custom method.
 

Re: SAR ADC DESIGN FLOW

where to start?
 

Re: SAR ADC DESIGN FLOW

1. Abstract model in Matlab where you insert imperfections and estimated performance.

2. Verilog or VHDL model of the digital

3. VHDL-AMS or Verilog-A model for the analog

4. Synthesis to get gatelevel Verilog or VHDL

5. Schematic design of the analog

6. Mixed verification

7. Analog layout

8. Place&Roue of the digital


This is a very generic flow mostly used for more complex mixed circuits. In the past I have seen SAR design only on schematic transistor level. I would prefer to skip 4 and 8 because to the tool cost and the skills for them are at a much different level.
 

Re: SAR ADC DESIGN FLOW

TQ ... That is very helpful but i find that to design SAR LOGIC UNIT is not stright forward ... the example in Tanner look impossible to achieve with full custom flow.do u know any way to design it using full custom flow only for logic unit.Most Paper dont include the ckt ..which puzzle me ...pls advice...
 

Re: SAR ADC DESIGN FLOW

You should firt refer to some ADC book.
 

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