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Help:why there are a lot of latched unmatched for formality

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newcpu

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When I run the formailty, there are a lot of latches unmatched in the reference RTL. When I search these latches in the netlist, there are no such latches indeed. Could anyone provide me some methods for debugging this problem?

Best Regards,
newcpu
 

You should read the manual of formailty, this is becase dff synthesis to two latch structure. So you should tell formailty how to deal with it .And i use conform, about this , command like:
set flatten model -latch_fold.
you can find some command like this at the manual of formailty

Added after 3 minutes:

Or anther answer is gate clock, synthesis add some latch to control gate clock , we should control those latch as gate , at conform :
set flatten model -latch_transparent.
 

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