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Error Amplifier Design

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Willt

Willt

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Hi friends,

I'm now designing an error amplifier for controlling a boost converter. Something are really confusing me now.

The output feedback voltage and reference voltage are the inputs of the error amplifier. As you all know, the output feedback voltage is a ramp up & down signal (shown in the attachment). The error amplifier amplifies the difference between two signals, right? So the output of the error amplifier is also a ramp up & down signal. However, all textbooks show that the output of the error amplifier is an analog signal or fixed dc signal. How come?? Is it due to the lowpass function of the compensation network of the error amplifier??

Your comment and guidance is highly appreciated. :D

Will
 

The output of EA is not a ramp signal. Remember that the step response of an apamp is a exponential(small step) or slew+exponential (large step) wave.
The same,the ramp input's response you can deduce also.
But why the output is a dc signal,it is not possible.At least,it must change due to input.Unless the opamp is dead.
 

Output of DC-DC converter is fixed DC voltage by LC filter. Choose suitable value LC for efficientcy, ramp, bandwidth.
 

I think bandwidth of op will effect the ramp.
 

You are sampling the output voltage of the DC-DC converter with a resistive divider?
How much capacitance do you have at the input of your amplifier ?

This will form a low-pass filter. Your error amplifier will also function as a low-pass filter with gain. Are the two time constants similar ?
if not, take the dominant time constant as an estimate.

Your ramp will appear at the output amplified (I assume, depends on your circuit,
what input voltages, reference voltage, what output voltages) and delayed by the time constant of your low-pass. Later stages (comparator) usually contain some form of sampling of this output (the delayed and amplified ramp), such as a latching type of comparator, for example.

Hope this helps.
 

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