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No its not true! I gues you have not worked with Handel-C compiler from Celoxica. It by default generates VHDL code for sequential exwecution unless you specify that you want to have parallel execution. This is done by using "par" keyword.
No its not true! I gues you have not worked with Handel-C compiler from Celoxica. It by default generates VHDL code for sequential exwecution unless you specify that you want to have parallel execution. This is done by using "par" keyword.
I know Handel-C and I know SystemC pretty well .. and we were talking about "C" .. the normal 'C' ..
C is a sequential language that contains no meaning of modeling parallel hardware (parallel processes) ..
If you think my statement is WRONG, please provide an ANSI C code representing a parallel process. ( I doubt you can, otherwise people like SystemC developers would have invented such thing!)
I agree Normal 'C' is purely sequential, and it is possible to convert "Normal C" algorithms to VHDL using Handel-C since it can handle sequential and parallel executions!!
So where does the problem lies??
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