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Suggest me a VCO buffer design

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flushrat

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I need a low-power buffer to convert vco's clock(1.4GHz) to rail-to-rail clock.
Use tsmc.18 rf process, and the total current less than 500uA.
Can anyone suggest me some structure?
 

vco buffer design

buffer stage is to convert the output signal from the
VCO core to a rail-to-rail switching signal . This can be achieved by the use of a two-stage buffer.An active current mirror makes the input stage, which serves both as a differential to single-ended converter and an amplifier. second stage the inverter is designed to make the output signal fully rail-to-rail switching.
 

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