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Spice netlist syntex check

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hmsheng

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Circuit designer provides spice netlist (CDL out with Cadence) to Layout engineer for LVS. The spice netlist is modified manually. So we can't assure the syntex is right.

So I want to know if there is some tool that can be used to check the netlist and tell us the syntex error in it.
 

Can we use LOGLVS do that?
 

you can check the spice syntax using calibre tool.
it has a feature of checking and converting different fomats.
 

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