3rd order distortion in differential CMOS amplifier

Hi,

Suppose you have an CMOS differential amplifier which has 2 exactly matched transistors.assume the transistors acts acording to the square law model.
since this is differential amplifier, the second order terms are in phase and thus cancell each other and you dont have 2nd order distortion as expected.

my question is, why there is 3rd order distortion? since a single mos transistor has only square terms (and thus second order nonlinearity) where is the 3rd comming from ? ( Assume also that you are not in triode region of the transistor).

suppose you enter a cos(wt) as the differential input, you can divide it for +0.5cos(wt) for one gate transistor and -0.5cos(wt) for the second gate transistor.
each transistor according to the square law model will exhibit the square of the 0.5cos(wt) according to :

Ids=k(W/L)(Vgs+Vi-Vt)^2 =k(W/L)(Vgs+0.5cos(wt)-Vt)^2

so you dont see here a 3rd order nonlinearity (you wont encounter the cos(3wt) for instance...)

Does anybody knows what is the reason? I am right? wrong?

Thanks,
Jimmy

In the real world, a transistor never follows the simple parabolic relation. This is merely an approximation used for easier hand-analysis.

Besides, other effects take place. Different non-linear capacitances are present in the circuit ( junction drain/source capacitances for instance ). Other high order effects such as pinch-off, hot-electron effects, DIBL..etc may take place too. So, life is not that easy)

Hi,

I am familiar with what you said (specially CMOS doesnt act according to theory).

But I am talking about theory only, even in theory You will observe 3rd order nonlinearity using the square law model for a FET.

why is that?