s3034585
Full Member level 4
hi guys
i need some help in understanding of how to implement a functionality.
i have 3 reg r1(10- 0), r2( 10-0) & r3( 10-0).
bit 5 of all the register decides whether the registers will shift or not in every clock cycle. thus we store these bits as mv1, mv2, mv3 for r1, r2,r3 respectively.
r3 register has a feedback also as follows:
r3(0)= r3(10) xor r3(9) xor r3(8) xor r3(4) .
initially there are some garbage bits in r3 from r3(10) - r(8). hence till the time i get all these bits, i need to store them in a shift register. once i get all the 3 bits i need to compute the feedback and now put it at location r3(3) because inorder to get the 3 bits r3(0) made a move of 2 locations. so initially we need to make a movement of 2 clock cycles to get all the bits later it is just one movement to get the feedback and it will be stored at r3(1) now..
can any one please please tell me how to implement this logic using shift registers.
Thanks in advance.
tama
i need some help in understanding of how to implement a functionality.
i have 3 reg r1(10- 0), r2( 10-0) & r3( 10-0).
bit 5 of all the register decides whether the registers will shift or not in every clock cycle. thus we store these bits as mv1, mv2, mv3 for r1, r2,r3 respectively.
r3 register has a feedback also as follows:
r3(0)= r3(10) xor r3(9) xor r3(8) xor r3(4) .
initially there are some garbage bits in r3 from r3(10) - r(8). hence till the time i get all these bits, i need to store them in a shift register. once i get all the 3 bits i need to compute the feedback and now put it at location r3(3) because inorder to get the 3 bits r3(0) made a move of 2 locations. so initially we need to make a movement of 2 clock cycles to get all the bits later it is just one movement to get the feedback and it will be stored at r3(1) now..
can any one please please tell me how to implement this logic using shift registers.
Thanks in advance.
tama