ds18s20
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I have observed an interesting behavior by the good old 555 timer. A simple test in a monostable mode reveals that the timer works as expected 
what a surprise
However I noticed that the internal latch somehow remembers its last state even when power is removed. So for example if you trigger the IC so that time cycle begins and then you cut-off the power before the cycle has had time to complete, then the latch will remember its previous state so that when power is applied again the cycle resumes?
I'm pretty sure that the IC is NOT supposed to work like that. I even left the IC out of the test bread board for few hours to make sure there isn't any internal capacitor that feeds the latch. However still no go, when power is applied the time cycle resumes.
Those don’t have some kind of non-volatile latch technology in them do they?
~B
what a surpriseHowever I noticed that the internal latch somehow remembers its last state even when power is removed. So for example if you trigger the IC so that time cycle begins and then you cut-off the power before the cycle has had time to complete, then the latch will remember its previous state so that when power is applied again the cycle resumes?
I'm pretty sure that the IC is NOT supposed to work like that. I even left the IC out of the test bread board for few hours to make sure there isn't any internal capacitor that feeds the latch. However still no go, when power is applied the time cycle resumes.
Those don’t have some kind of non-volatile latch technology in them do they?
~B
