sarabjeet
Newbie level 2
I want to know how to go about designing comparator with hysteresis (ie what steps to follow given a spec).
Considering this to be a comparator using diff amp with pfets as diode load and with them two pfets giving positive feedback. We see hysteresis when W/L of pfets providing positive feedback is greater than W/L of pfets as diode load.
What steps to follow from a spec? How to select bias I, input device W/L, load W/L, etc.
Given hysteresis window size (eg 100 mV), how to select ration of W/L of +ve feedback pfets to W/L of diode load pfets.
Thanks
Considering this to be a comparator using diff amp with pfets as diode load and with them two pfets giving positive feedback. We see hysteresis when W/L of pfets providing positive feedback is greater than W/L of pfets as diode load.
What steps to follow from a spec? How to select bias I, input device W/L, load W/L, etc.
Given hysteresis window size (eg 100 mV), how to select ration of W/L of +ve feedback pfets to W/L of diode load pfets.
Thanks