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if u are talking about PLL for f.s. , u can say jitter"phase noise", range of freq. , resolution, settling time
other application may include max. long run "CDR"
but i think that jitter is the most tragetted spec.
p.s. of course as throwaway said we should make pll satble
regards
Pll is not a simple device
It is a device that chan work in several ways for a diferents kinds of applications, so can't be one unique concern, it depends of the aplication.
it will depend on the PLL usage
if u will use it as frequency synthizer the phase noise will be ur major target , and loop speed "settling time" , and for sure stabilty
if u will use it as demodulator the loop bandwidth , and speed will be ur major concern , and so on
Phase noise is not the greatest but aways an issue in PLL design.
Phase noise actually affects the phase detector rather than the whole system.
Jitter worsens this phase noise, and it becomes a cumulative error function!
Razavi, "Principles of Data Conversion System Design"
stability is more important performance than other characteristics in pll design, even as SkyHigh said,phase noise is not the most important but always an issue, noise lie in every module,such as vco,lpf. here paper PLL_sutra.pdf may offer some advice, u can google it on internet
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