Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

a question about ARM processor

Status
Not open for further replies.

shiningblue

Newbie level 6
Joined
Jan 25, 2005
Messages
12
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
USA
Activity points
92
does anyone use ARM processor series?

If you do, could you tell me what is the relationship between the cache and the memory of the ARM processor, is it write through or write back?

I am totally confused.

Thanks
 

There is no relation b/n the cache and memory of the ARM core (u r thinking of inbuilt I guess). Cache is extremly costly but with good performance. There are modren ARM cores with in-built Cache especially for network processors with StrongARM as core engine; where you have these, write through/back options will be used to handle memory. On the other hand, u can even interface memory externally/certain cores exists in built SRAM/DRAM through the address bus which will be connected to AMBA bridge inside ARM.
...abid
 

Thank you for your reply.
Yes, the cache I mean is build-in the arm process. Since there are no specific I/O for the arm process, everytime I write data outside of the process, like to fifo, it seems that the data will be first written to dcache, and then written out. If I try to write out the same data, I just get one from the fifo, so I think it might be the problem of cache.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top