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LVS, DRC, and analog simulation ?

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Vonn

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Hi guys , Iam doing my first ASIC design , Iam using VIRTUOSO SPECTRE CIRCUIT SIMULATOR as my simulator tool from cadence and DESIGN ANALYZER as a synthesis tool from synopsys and SILICON ENSEMBLE PKS as my place&route tool , up to know I did the simulation , synthesis , p&r and every thing is ok , but what I need to know how to :
1- Do DRC ? I tried to find in SILICON ENSEMBLE any link to do DRC but I can't find it ??
2- Do LVS ??
3- and Finally how to make back annotation and perform the analoge simulation?

thanx
 

For DRC and LVS you can use Cadence Assura, Synopsys Hercules, or Mentor Calibre. Calibre is the most popular.
 

thanx gliss , when I looked at the Cadence Assura manula , the first step says: In the Layout Editor, select Tools, Assura from the menu.... actually Iam using SILICON ENSEMBLE as my P&R and i can't see (tools) in the menu? Do they mean another tool other than SILICON ENSEMBLE as a layout editor?
 

Assura is a seperate tool. You might be able to run it from the SE interface but it's installed seperately.
 

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