Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

how many clock should protocol reset be kept?

Status
Not open for further replies.
Hi,
Generally Reset should be asserted for long time. Reset of one or two clocks will not help.

Let me know if I am missing some point from your question.

Regards,
Jitendra
 

hi,
1. period depend on how many period your design should be in stable
2. how long your system should be in stable.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top