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A question about this circuit

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wjxcom

wjxcom

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Dear all: look at this circuit please. this circuit is a output stage which introduced in the book writed by Gray(page 383). In this book, Gray said that "for simplicity, assume at first that a short circuit is connected from the drain of M4 to the drain of M5,.....".

But I do not think that this suppose is logical. Because M3 produce current and this current must be transfered by M4 and M5, so both M4 and M5 can not cut-off. but when a short circuit is connected from the drain of M4 to the drain of M5, I think M4 or M5 will be cut-off, so the current produced by M3 will not be transfered.

So I think the suppose is illogical.
 

The proposal is logical to simplify his argument: when he said short M4 to M5 drain, what he really meant is AC short (i.e. in terms of small signal ac analysis). This will help you to analyze the impedance issue and push-pull operation.
 

Hi, willyboy19: you said that short M4 to M5 drain means AC short, but how to analyse DC under this proposal?

thanx
 

I would go with the power current mirror explanation. Firstly you control the overall current through the devices bias connection. Then you modulate the output from the input gate

Barrybear
 

This is very calssic output stage. Level shift to make sure low distortion.
 

Hi, all: I want to know that when a short circuit is connected from the drain of M4 to the drain of M5, does DC current transfer to M4 and M5?
 

hi wjxcom,
i attache equivalent circuit of your diagram.
M4 & M5 used to bias M1 & M2.
when we connect drain of M4 to drain of M5. it is equal to set two MOSFET threshold voltage equal to zero.
In this way output/input charactristic will be changed. and it produce distortion.
 

Dear Davood Amerion: but why the equivalent bias voltage of M4 and M5 is Vt? at the same time, in any case, the drain voltage of M4 and M5 should not be equal, is it?
 

yes it is.
for simplicity we assume M4 & M5 with Vt.
actualy, Vt of M4 change with Vt of M1, and M5 change with M2.
and when MOSFET conducting it's Vgs is greater than Vt.
In saturation region: Ids=(W/L)(K/2) * (Vgs-Vt)^2
for Ids low, we can assume Vgs≈Vt.
I think, in this regard, quiescent current of M1,M2 is equal to current source of M3.
 

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