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opamp design for dc signal measurement!!

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beargebinjie

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hi guys ,i am doing with a delta-sigma adc which used to measure a nearly dc signal ,i found it is hard to hace an opamp with bandwidth less than 800k but with its gain larger than 80db and phase marge more than 80 °. and of course the settling time is also a important specification, it is really difficult to achevie this spec. Is there anyone have good idea to tradoff between settling time and PM, the compensation capacitor is key factor .
 

you need a larger gain,so go for two stage.,
as u r gbw is very less,u can use very less second stage current,so it improves the gain.use large device lengths for high gain.,
it improves the phasemargin,and inturn have good settling time.
 

is PM and settle time a trade-off?If PM is increased,then the settle time is large?
 

do you guys konw is there any direct relationship between the settling time and GBW?
 

now i have gotten the result close to my requirement.
fisrt. reduce the opamp's tail current and the fisrt stage's input mosfet's (w/l), this behavior will get low gm1,it reduce your GBW.and leng channal length will give alrge gain .I found settling time has nothing to with the compensation capacitor, larger second stage current ,less settling time. good phase marge could got from compensation cap and nulling resistance.
 

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