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  1. #1
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    set_clock_gating_check

    hi,
    How to decide what value shoud I put for set_clock_gating_check setup & hold time? Frequency for my design is 80Mhz

    •   Alt21st February 2006, 03:57

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    set_clock_gating_check -high

    maybe decided by your gated clock cell!!



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    set_clock_gating_check

    set_clock_gating_check is set on the AND cell, which provided gated clock output.

    it garantee the clock should arrive earlier than the gating signal, and its value is decided by the input pin relation of the AND cell that you selected.

    generally, it is just an additional check, if you put the LATCH and AND cell close enough, then it is just no need to set.


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    •   Alt23rd February 2006, 14:04

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    set_clock_gating_check

    if u have gated clocks in the design, then it is best to use set_clock_gating_check. Otherwise u may end up in surprises while testing



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    set_clock_gating_check

    may be this article will help u,"How To Successfully Use Gated Clocking in an ASIC design ,Darren Jones ,SNUG Boston 2002".
    enjory it.
    regards



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    Re: set_clock_gating_check

    Quote Originally Posted by free1983
    may be this article will help u,"How To Successfully Use Gated Clocking in an ASIC design ,Darren Jones ,SNUG Boston 2002".
    enjory it.
    regards
    Here it is:
    http://www.edaboard.com/viewtopic.ph...t=darren+jones


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    set_clock_gating_check

    clock gating using the reduecd power consumtion .
    clock gating means stop working of the clock.but that FF value doesnot changed

    vamsi



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