Thread: Digital oscilloscope Project

joilen: It is good information for me, but
I need any information about a stroboscopic method of the measurement for DSO!

I need any information about a stroboscopic method of the measurement for DSO! The stroboscopic method allows to measure Frequencies up to about 3 GHz.

another project link.

:? http://www.enetsystems.com/~lorenzo/scope/

enjoy!

" I need ideas about 'triggering' "

My design will be based on a simple
FPGA/CPLD or a fast Scenix SX + FIFOs.

If I don't need to implement "pre-triggering", I suppose I don't have to store samples all the time. Only a trigger signal from analog channel or external trigger channel is required to start acquisition of "n" samples with sampling rate
of "m" MPSP.

After filling FIFO, I'll start USB2.0 transfer with
CY7C68013 (Cypress EZ-USB2+8051 IC)

I want to know about triggering circuit. How can I do that in analog way?

I need to generate a pulse from specified level and specified edge (hi-to-lo or lo-to-hi) of the analog signal and then I'll set a flip-flop, and reset this flip flop after FIFO filled so I wont get repeatedly pulses for every matched level-edge during sampling.

For setting trigger level, I am thinking about using a DAC/digital potentiometer. Or If I do this after ADC, I can use 8 bit magnitude comparators...


May be I'm in wrong way. What do you think/recommend?

If you don't want to pre trigger by storing samples in a circular buffer, why don't you implement a digital compare for the sampled AD value.
If you want to detect e.g. low to high transition you have first to wait that the AD input value becomes smaller than the trigger level. then you can reset your trigger pulse. the next time the ad value becomes equal or higher than this level you can set the trigger pulse.

the advantage of this way is you can implement a triggering unit without any additional analog hardware which can drift by temperature ans so on.
another advantage is you can implement schmitt triggering behaviour when having two independant levels for upper and lower AD value. To implement this with analoge matters you will have to build up two DACs or else.

Hope it helps,
aOxOmOx

try to use gameboy for small oscilloscope

Has anyone schematic or principle of an oscilloscope input section??

mainly with the following requeirements:

- high BW
- high impedance
- low distortion
- low noise / high sensitivity

Any suggestions for a good HF input attenuator circuit??


Any help is appreciated.

Hi people,

Could anybody go forward and build something?
Any interesting to share ??

Regards,

MArtin

Hi

I have a bitscope since a couple of years, and now I like to make a update to the communication between PC and bitscope. They (Bitscope) sell a ethernet-RS232 and one highspeed USB-RS232 adapter. I think they are a bit to expencive to order, must add custom tax and VAT. So I wonder if there are any projects I can use to get either a USB or Ethernet adapter, PIC code or sch.

More info here:

www.bitscope.net/store/?p=view&i=item+0
www.bitscope.net/store/?p=view&i=item+1

Thanks in advance for any help
Cl

Originally Posted by martingn

Hi people,

Could anybody go forward and build something?
Any interesting to share ??

Regards,

MArtin

I am starting building a project similiar to the ldso next week. Just waiting on parts at the moment, i will keep you updated here

bitscope is two channel 40MHZ sample,it is use two tlc5540,if you need higher frequency sample,you can use maxim adc to do it.

:) hellow every one. I'm comes from China mainland. I'm looking for (and want to join in) a free project to build up lowcost PC scope. for our
Chiness people most of equipment are too expensive to buy,so it's a goold idea to build up one my self, if any one can help? Thanks .

Look at the links posted above especially the chocbar project. I am just beginning to gather parts to build this one so it should be interesting

I have a project that i never got to finish.. One of those things .. It's a nice idea .. but too pricy and complex .. it's a scope in a PCMCIA card
i think that i will migrate the whole design to a FPGA .. i was using Ti a DSP and a CPLD(triscend ) for the interface .. but it is too big for the little room !

thanks. I think as an equitment to test radio equipments.high speed (dual channel 80Msps or highter) is more useful for me,tom's design spand too much time on storage depth, may cause high price for one to build up.I think for common use(and for me) 64K storage depth is enough.
In China the cheapest A/D chip is TI ads831e (8BIT 80Msps).If any one has used it? i just want to know if it is realy as good as TI says?

:) I had read a lot this days.And finally I found MK3 by David Jones is the easyest to buile up PC-based DSO.It is realy a old project,build up by some classic 74HCxx TTL chip,None CPLD even has no MCU.I think it is the right thing I need,one reason is that a basic CPLD chip as ALTERA EMP7128S cost about 80Y/8=10$ in China ,it is a large number for me and my friend Li.
But the A/D chip used in MK3 is only works at 20Msps,It is not enough,I want use an ADS831 (TI-BB) instead.Now the disadvantages of FIFO chip become a big problem.I could not find out an FIFO chip who can work on the clock rate of 80M.could any one can help me just to find out something cheap which can works on the high speed normal?thanks!
Or any one has advice for me,do let me know please.
Best Regards.

Hi, look here http://www.soudez.org/Page_Projet2.php.
It's a two channels DSO (2x100MS/s with FIFO), I've just finished the schematics. I'm going to do the design of the PCB. The purpose of this project is to have a cheap self powered DSO on USB port. Open source design, comments welcome !
@+,

Dear monnoliv,
I'am in china,I can not enter this site:
http://www.soudez.org/Page_Projet2.php

Why?

Server was busy, try now ...
A+

Originally Posted by tryagain

bitscope is two channel 40MHZ sample,it is use two tlc5540,if you need higher frequency sample,you can use maxim adc to do it.

hi,
do you have cpld's required files.if so please send to me .
regards.