echoangel9111
Newbie level 5
Hello,
I am very confused on understanding hold constraints on a positive edge trigger flop.
I know it is Tcq + Td >= T hold
but when you introduce a clock slew , how does this work?? aka pipelines
are there any diagrams people can show?
I am very confused on understanding hold constraints on a positive edge trigger flop.
I know it is Tcq + Td >= T hold
but when you introduce a clock slew , how does this work?? aka pipelines
are there any diagrams people can show?