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Replacing 80C51 in circuit with external program & data memory with DS89C430

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DrWhoF

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I tried to replace 80C51 in circuit with external program and data memory with DS89C430 but it does not work.
When I tried 87C51 circuit works fine.
What can be the reason?

DrWho
 

ds89c430 ckcon

Even if you use non-page mode for compatibility with traditional 8051 (the default mode of the DS89C430 following a reset) consideration must be made relating to memory type and speed.
Since the basic instruction execution time has been streamlined in the DS89C430, the time available to transfer data to and from memory has also been reduced. This means that for the same frequency crystal, there is less time available for memory access.
The other issue having to do with speed consideration is the use of software timing. Software writers often use the presumed constant execution speed of a processor as a real time reference to generate delays. Since the DS89C430 executes instructions much more quickly than the standard 8051, these previously designed timing loops will no longer produce the originally intended results.

Read more about the new drop-in requirements:

**broken link removed**

Since external memory timing in non-page mode is almost identical to the 4-clock-per-machine cycle DS87C320 a read of

**broken link removed**

don't harm.
 

    DrWhoF

    Points: 2
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ds87c320 serial ports

Speed and timing, as Silvio has explained, are very criutial ..
There is, however, on more thing that you have to be aware of, namely security level (ie. security bits) ..
Have a look at picture below to find out of possible levels ..

Regards,
IanP
 

    DrWhoF

    Points: 2
    Helpful Answer Positive Rating
Re: DS89C430 and 8051

Very well pointed out. I forgot about level 4 protection.
 

Re: DS89C430 and 8051

Can I ask you one question: what is the reason you would like to replace 8051 with DS89C430?
My gut feelings are that without several software and hardware changes you wouldn't be able to replace one CPU with the other, although Maxim claims, that you can ..
This CPU is just to fast .. ( ≈1MIPS per 1MHz of clock), and even if you "slow it down" by setting/clearing certain bits in its SFR (by the way, how are you gong to do that?), I don't think you can just replace the "old" 8051 in its "old" environment with the DS89C4XX and expect it to work ??!!

Regards,
IanP
 

    DrWhoF

    Points: 2
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Re: DS89C430 and 8051

This simple reason is that I just have some of DS89C430 and I thought that they would run faster.
Now, what steps should I undertake to make them working?

DrWho
 

Re: DS89C430 and 8051

I would start with replacing crystals: from, say, 12MHz (11,059200MHz, ..) to 2MHz, or less ..
But, again, does it make any sense?
You will probably spend more money on these crystals than on, say, AT89S51 with Flash ..

Regards,
IanP
 

    DrWhoF

    Points: 2
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Re: DS89C430 and 8051

DrWhoF said:
and I thought that they would run faster.

I apologize for the following. Sorry No offence.

Not only that you thought they would run faster. Definitely it will run faster.
But do you really need that speed ?
If you give me a small argument concerning an application which requires lower latency then I'll be glad to help you. But please don't tell me about code that use floating point variables used later to be displayed on LCD.

Hope I didn't was too rude.
 

    DrWhoF

    Points: 2
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Re: DS89C430 and 8051

I tried with 1.832MHz crystal and it still doesn't work.
My circuit receives data via serial port, puts bytes into a buffer and after performing certain calculations sends data out through 2 microprocessor pins: data and clock.
The fastest baud rate with 11MHz clock and without loosing bytes is 1200bps.
I need 9600bps!!!
 

Re: DS89C430 and 8051

9600bps could be achieved easily at 11.0592Mhz clock.

You've had to decrease the baud rate to 1200bps due to lost of bytes ?
Or because your microcontroller buffer gets filled quickly and you're not able to sustain the input data rate ?
Then what stops you to use the handshake RTS-CTS and keep the 9600bps ?
Or get a bigger serial buffer.

If performing certains calculation before sending data out through 2 pins (data and clock) is done quickly and then waits to deliver data according to a lower clock period.
Then what's the gain of performing quickly the calculations ?

I'm not a trafic cop watching the bytes walking on the serial wires at constant speed of 1200bps (penalty speed) and get mad if runnning at 9600bps in burst.

The IanP's advice of using 1.832Mhz crystal was in order to keep the current hardware and software (almost) configuration and get benefits of converting to DS89C430 only from flash memory point of view.

I'm pretty sure that you can achieve 9600bps without changing to DS89C430 but with litttle changes in current software routines.

Converting to DS89C430 and use the selectable high-speeed clock to the timers can affect baud rate generation for the serial ports.
I know you read this at: **broken link removed**

But some changes have to be done in software.
And I really don't think it worths the effort and headache until all required software changes has been exhausted in old project.

Look at 9600bps baud rate an incoming charater is received in 1041 us.
Until SCON.0 being set you can execute 960 instructions at 11.0592 MHz XTAL clock and standard 8051. Well, maximum since not all instructions are executed in single machine cycle. But you can take an average of 700 instruction , which are quite of lot.

If you now receive at 1200bps then you must be terrible busy during 7680 instruction (maximum).
Hope you use interrupts and not polling for SCON.0 and SCON.1
 

    DrWhoF

    Points: 2
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Re: DS89C430 and 8051

With the 1.832MHz crystal ( I guess the correct frequency should be 1,8432MHz ), what actually do you have?
I mean after reset, what happens next?

Regards,
IanP
 

    DrWhoF

    Points: 2
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Re: DS89C430 and 8051

You are right it is 1,8432MHz.
I am using terminal software to monitor what is going to and comming out of my circuit and with standard 87C51/89C51 after each string of ASCII bytes my circuit sends 1 byte out as ACK.
When DS89C450 is in nothing is sent out and strange pulses every 30ms appear on RST pin and it looks like microcontroller is running in endless loop.
After reset it should send out 20 bytes of identification but I can't see anything on my monitor screen so I assume that nothing is sent out.
When I replace DS89C450 back with 87C51 it sends out identification bytes and it can not synchronize with serial port because of 1,8432MHz crystal but at least it send bytes out. If I replace crystal to 11,059MHz everything works OK.
Why DS89C450 doesn't work?
 

Re: DS89C430 and 8051

DrWhoF said:
When DS89C450 is in nothing is sent out and strange pulses every 30ms appear on RST pin and it looks like microcontroller is running in endless loop.

The reset pin of DS89C430 has an additional feature compared with 89C51.
The RST pin is bidirectional I/O.
The RST pin level is asserted as long as an internal reset is asserted
.
However the drive capability of this I/O port may be insufficient if the RST pin is connected to a RC reset circuit.
If you are able to see pulses on RST pin then you have week external capacitor being easily discharged and charged.
Or an external brownout detect circuit with open source output. I don't know your original 89c51 hardware configuration.


The internal reset is caused mainly by:
1. power fail reset
2. watchdog timer reset
3. an oscilator fail detect reset

Please find bellow some comments, all related to time.
You can figure out which of the above enumerated reasons caused the reset by looking at the pulses period. Nevertheless you can do it in software by interrogating the flag bits associated with reset sources.

1. The power monitor invokes a reset state when Vcc drops bellow the threshold condition.
Once Vcc meets the minimum voltage requirement the processor exits the reset condition automatically, restarts the external crystal oscillator and counts 65,536 clock cycles (to allow the oscillator to stabilize) before execution begins at location 0000h.

2. The reset state maintains for 13 clock cycles. But only if watchdog is enabled. Since I'm 100% sure it was not done in software and probably you didn't touched the MTK program to enable watchdog hardware, then this is not the cause of the internal reset.

3. When enabled, this circuit causes a reset if the oscillator frequency falls bellow 20khz and holds the chip in reset until the oscillator frequency rises back above 20khz.
But as I said only when enabled by setting PCON.4 to a logic 1. Since you didn't done that in your software, then you can discard this presumption too.

I've tried to explains why pulses are coming out on RST pin and not why your circuit is not working after 89c51 replacement with DS89C450.

If the EA pin is still tied to ground means you didn't used yet the DS89C430 flash, then my advice is to load into your external memory an ordinary program that blinks a LED in order to see that the working conditions are accomplished (XTAL, VCC, memory code fetch and so on).
 

Re: DS89C430 and 8051

Code:
	ORG	 0000H 

	MOV 	TMOD, #20h
	MOV 	SCON, #52h
	MOV	 PCON, #80h
	MOV 	TH1, #0FAh
	MOV 	TCON, #40h	; SETB TR1

	MOV 	50h, #'H'
	MOV 	51h, #'E'
	MOV 	52h, #'L'
	MOV 	53h, #'L'
	MOV 	54h, #'O'
	MOV 	55h, #10		; LF 
	MOV 	56h, #13		; CR

;-------------------------------------------------
;Main Program 
;-------------------------------------------------

Ser_Loop:	
	LCALL 	send_string

Not_Continue:
	MOV	B, #0FFh
	DJNZ	B, $
	LCALL 	ser_in
	CJNE	A, #'c', Not_Continue

	SJMP	Ser_Loop

;-------------------------------------------------

send_string: 
	MOV	R0, #07h		; Loop counter ..
	MOV	R1, #50h

S_Loop:
	MOV 	A, @R1 
	LCALL	Ser_Out
	INC	 R1
	MOV	B, #0FFh
	DJNZ	B, $
	CPL	P1.0
	DJNZ	R0, S_Loop
	RET

Ser_Out:
	JNB	TI, $
	CLR	TI
	MOV	SBUF, A
	RET
 
;-------------------------------------------------

ser_in: 
	JNB 	RI, $
	CLR	RI
	MOV 	A, SBUF
	RET

; --------------------------------------------------

	END 
 
; --------------------------------------------------

	END

Try to run this simple code (external program memory) ..
It should send out HELLO at 9600bps, should generate a square wave at pin P1.0 (you can change it if you need to), and should wait till you press 'c' to send the HELLO string and square wave again ..
Also, if you can, isolate the RST pin from the external reset circuit; with the 89C450 it doesn't need to be connected to anything ..
While you try this code, have a look (oscilloscope) at the RST pin ..

Regards,
IanP
 

    DrWhoF

    Points: 2
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Re: DS89C430 and 8051

I disconnected RST pin and used your code.
It sends HELLO all over again.
RST pin has pulses every 30ms.
 

Re: DS89C430 and 8051

It sends HELLO all over again.

If this is the behaviour of the program at power up, without touching the PC keyboard, it means the micro is not ever being able to fetch the "LCALL ser_in". Not even once.
Otherwise after sending the first HELLO, the program should stop waiting to receive a character from the keyboard. If it's 'c' then another HELLO string is sent to the PC.

If DS89C430 is driven by 1,8432MHz crystal, then according to TH1 = #0FAh and SMOD set, the baudrate should be 1600bps. Quite uncommon isn't ?
Since both T1M (CKCON.4) and T1MH (CKMOD.4) are logic 0 by default at reset for compatibility purpose, the Timer 1 input clock is fixed at the oscillator frequency divided by 12. The old formula is still available.

However if you see HELLO scrolling on hyperterminal screen, then I have no doubt you've changed the TH1 contents.

If the watchdog is enabled (let say it is) the timeout period is 2^17 * oscillator period = 71ms
Beyond the 30 ms, thus it's not the reason of reset.

At 1600 bps the time required for sending one byte is 6,25 ms. Thus for complete string of 7 bytes you need 43,75 ms
You said that the micro sends HELLO all over again and RTS pin has pulses every 30ms.
Can you tell me what is the value of TH1 now ? I'm trying to figure out what the heck is doing the micro during 30ms.
 

Re: DS89C430 and 8051

The series of pulses on the RST pin is caused by the Watchdog Timer ..
To disable the Watchdog Timer reset you have to clear EWT bit in WDCON register ..
As it is special function bit, the access to it is not direct as to most of bits in the Special-Function Registers (SFR) .
Timed access requires the software to write two specific values to the timed-access register during two consecutive instruction cycles. The values AAh, then 55h, must be written in consecutive instructions to the TA register at SFR location C7h. If the writes are performed correctly, the write-access window opens for three memory cycles. During this window, the software may modify a protected bit. The codes to open a timed-access window are:
MOV TA, #0AAh
MOV TA, #55h
So, the modified code to print HELLO and wait for the key"c" (and turning ON/OFF pin P1.3) is below (Q=11,0952MHz, 9600bps) ..


Regards,
IanP
Code:
$NOPAGING
$MOD252	

WDCON		DATA	0D8h
TA		DATA	0C7h

	ORG	 0000H

	MOV	TA, #0AAh
	MOV	TA, #55h
 	CLR	WDCON.1	; Disable EWT

	MOV	B, #0FFh
	DJNZ	B, $

	MOV 	TMOD, #20h
	MOV 	SCON, #52h
	MOV	PCON, #80h
	MOV 	TH1, #0FAh
	MOV 	TCON, #40h	; SETB TR1

	MOV 	50h, #'H'
	MOV 	51h, #'E'
	MOV 	52h, #'L'
	MOV 	53h, #'L'
	MOV 	54h, #'O'
	MOV 	55h, #10		; LF 
	MOV 	56h, #13		; CR

;-------------------------------------------------
;Main Program 
;-------------------------------------------------

Main_Loop:
	LCALL 	Send_String

Not_Continue:
	MOV	B, #0FFh
	DJNZ	B, $
	LCALL Ser_in
	CJNE	A, #'c', Not_Continue
	SJMP	Main_Loop

;-------------------------------------------------
;Character sent subroutine 
;-------------------------------------------------

Send_String: 
	MOV	R0, #07h		; Loop counter ..
	MOV	R1, #50h

S_Loop:
	MOV 	A, @R1 
	LCALL	Ser_Out
	INC	 R1
	MOV	B, #0FFh
	DJNZ	B, $
	CPL	P1.3
	DJNZ	R0, S_Loop
	RET

Ser_Out:
	JNB	TI, $
	CLR	TI
	MOV	SBUF, A
	RET
 
;-------------------------------------------------
;Character receive subroutine 
;-------------------------------------------------

Ser_in: 
	JNB 	RI, $
	CLR	RI
	MOV 	A, SBUF
	RET

; --------------------------------------------------

	END
 

    DrWhoF

    Points: 2
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Re: DS89C430 and 8051

The default power-on reset state of EWT is determined by Option Control Register bit 3 (OCR.3) located in fifth flash memory block.

Setting this bit (OCR.3) to 1 disables the watchdog reset function on power-up, and clearing this bit to 0 enables the watchdog reset function automatically.

As long as this block (in brand new DS89C430 chip) has by default a value of FFh and if the watchdog is the source of reset then either DrWhoF or someone else did this:
 

    DrWhoF

    Points: 2
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Re: DS89C430 and 8051

I tested that code in external (EPROM) and internal (FLASH) options and it worked well.
Without CLR EWT DS89C450 is reset and sends HELLO in a loop.
When I execute R command this is what I have:
R<0D><0A>
LB:00 OCR:F7 ACON:1F CKCON:01 P0:FF P1:FF P2:FF P3:FF FCNTL:B1<0D><0A>
How can I erase OCR register to FF?
I don't have parallel programmer and in-system programming doesn't accept
W OCR FF
 

Re: DS89C430 and 8051

The only solution is using In-Application-Programming.

Use the above code to erase OCR register to FFh.

Code:
WDCON   DATA   0D8h 
TA      DATA   0C7h
FCNTL   DATA   0D5h 

   ORG    0000H 

   MOV   B, #0FFh
READ_FCNTL:            ;Make sure the FBUSY bit is 1 
   MOV   A, FCNTL      ;to indicate flash MMU is idle.
   JB    ACC.7, ERASE_OCR
   DJNZ  B, READ_FCNTL
   MOV   A, #01
   AJMP  ERROR  ;timeout

ERASE_OCR:             ;Write 0Ch to the FCNTL register 
   MOV   TA, #0AAh     using the timed access sequence.
   MOV   TA, #55h 
   MOV   FCNTL, #0Ch

   MOV   B, #FFh
PROG_START:            ;Make sure the FBUSY bit is 0 
   MOV   A,FCNTL       ;to indicate programming has started.
   JNB   ACC.7, WAIT_ERASE
   DJNZ  B, PROG_START
   MOV   A, #02
   AJMP ERROR

   MOV   B, $FF        ;Wait for FBUSY bit to return to 1
   MOV   R0,$FF        ;to indicate end of programming operation.
WAIT_ERASE:
   MOV   A,FCNTL
   JB    ACC.7, PROG_ERROR
   DJNZ  B, WAIT_ERASE
   DJNZ  R0, WAIT_ERASE   
   MOV   A, #03
   AJMP  ERROR

PROG_ERROR:            ;Make sure FERR is 0
   MOV   A, FCNTL      ;to indicate no programming error.
   JNB   ACC.6, READY
   MOV   A, #04

ERROR:
   MOV   P1, A         ;test with a DVM the P1 pins status
   AJMP  $

READY:
   MOV   P1, #FF
   AJMP  $
 

    DrWhoF

    Points: 2
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