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  1. #1
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    set_input_delay

    hi

    set_input_delay means delay that ideal source to input port delay and set_clock_latency means that we estimate postlayout clock tree latency.
    My question is comming.What is the fllowing three command different(I think that first command is the same as third command, true?)

    set_input_delay 1 [get_ports CLK]
    set_clock_latency 1 [get_ports CLK]
    set_clock_latency -source 1 [get_ports CLK]


    thanks.

    •   Alt21st December 2005, 02:09

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  2. #2
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    set_clock_latency

    Hi Websterskimo,

    As far as I know, set_input_delay is used to constrain datapath, I never see it apply to CLK :D



    •   Alt21st December 2005, 02:23

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  3. #3
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    set_input_delay synopsys

    it must apply to clk reference.
    input_delay is related to clk edge.
    first command Ur giving for input delay according to clk edge.
    second command- Ur telling clock latency (arrivel of clock-notslew)at last(fariest) FF delay.
    3rd command- Ur telling clock latency in source means first(neariest) FF delay.

    i think u can understand from my definations
    see u


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    •   Alt21st December 2005, 03:27

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  4. #4
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    set_input_delay -add_delay

    hi websterskimo,

    For better understanding, u can check in SOLD (Synopsys Online Doc).



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    set_input_delay

    using the man command in dc:
    dc_shell-t>man set_clock_latency

    you can find that:
    ***********************************************
    -source
    Indicates that delay is to apply to
    clock source latency. By default, delay
    is applied to clock network latency.
    ***********************************************
    that is the difference



  6. #6
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    set_input_delay -max

    set_input_delay specifies the input arrival time of a signal in relation
    to the clock. It is used at the input ports, to specify the time it takes for the
    data to be stable after the clock edge. The timing specification of the
    design usually contains this information, as the setup/hold time
    requirements for input signals.

    set_clock_latency command is used to define the estimated clock
    insertion delay during synthesis. This is primarily used during the prelayout
    synthesis and timing analysis. The estimated delay number is an
    approximation of the delay produced by the clock tree network insertion
    (done during the layout phase).


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  7. #7
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    set_input_delay dc

    the input delay of the first command is 2 related the source of the clk if you use the second command simultaneously. input_delay + clock_latency


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