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How to achieve high impedance at a gate in my circuit?

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high impedance input

This is my circuit and i have a quick question. I want to achieve 0V or high impedance(open circuit) at the gate of a N-Channel JFET,Tr2. I have used a NPN transistor with the collector connected to the gate of the N-Channel JFET. when i switch to 5V at base of Q4 the gate of Tr2 will be at 0V and when i switch to 0V, gate of Tr2 is high-Z right ? thanks much
 

Re: high impedance input

To open or close FET's channel you need to control Ugs (voltage between Gate and Source, in your drawing (2) and (1) respectively) ..
In your circuit the FET is not referenced to anything .. it is just floating ..
Regards,
IanP
 

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