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PFM modulator of Buck regulator

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mitgrace

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buck pfm

Dear All :

Does anyone know how to desgin PFM modulator of Buck regulator , I read some paper , The circuit is like Ve compare with VH , Vl , The Using R_S latch to generator the PFM mosulator . Is it correct ? How is depant on the loading ?? Thanks
 

pfm buck hysteretic

There are much kinds of PFM structure .
Can you write your PFM clear ?

Anyway,there is one comparator circuit in PFM,which compare the FB and Vref,and control the ON time or OFF time.
 

buck pfm control

Dear Sir , this is my structure .
 

gated-oscillator pfm

i like this idea, but it is not quite pfm. it is closer to hysteretic mode, which is a little more difficult to avoid the finer problems.

you may consider gated-oscillator pfm at first. you would use a simple comparator to compare FB to VREF. If FB is lower than VREF, logic high from comparator is AND-ed with an oscillator to give pulses to the switch. Once FB is satisfied, input to AND goes low and device gives no more pulses. In steady-state, device hops into pulsing at a rate dependent upon load.

This is simplest implementation, I think you should start out with this. But feel free to PM me if you have bigger dreams.
 

problems with hysteretic buck regulator

Excuse me , What is gate-oscillator pfm ? Do u have any doc or paper ? Thanks
 

sure, here is a pic from the maxim website. they use this technique in several ic's, but call it clocked pfm.

like i mentioned, it's a very simple structure, error comparator is anded (or latched as seen here) with an oscillator. if fb is below regulation, the clocks feed through to the driver to give pulses into the inductor. if fb is above regulation, no pulses get through.

**broken link removed**

and here is the full appnote
**broken link removed**
 

There are some different PFM control schemes:constant on_time PFM , contant off_time PFM and so on. Maybe you can get other PFM schemes from linear or ti product.
 

buy some books to learn,ok?
 

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