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Why coreConsultant can generate a readable Verilog file?

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clivechen

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coreconsultant

hi:
I use the coreConsultant to handle AMBA bus IP, but why the coreConsultant can't generate the readable verilog file(just like binary code).
Thanks for any reply
clive
 

coreConsultant question?

coreConsultant can only generate ecrypted codes.
 

coreConsultant question?

yeah, i got it! thank you very much!

but if i got the ecrypted codes, can i use them in the simulation tools (e.g modelsim or NC-verilog), how can i do that?

thank you again!!!!
clive


en~~, I have another question, if i want to add the verilog codes which writed by myself into the project which created by coreAssembler to build a big system, can i do that? does that need more license?

thank you
 

Re: coreConsultant question?

coreConsultant can also generate what is called a gtech representation of the core. This can be used for simulation with any simulation tool. You will have to have the Synopsys gtech libraries to do so. Gtech is in a netlist format fyi.

To generate readable rtl, you need the core's source license.
 

Re: coreConsultant question?

Hi,

I have a peculiar doubt here, as i donno what is core consultant? and what is this tool going to do? I would be happy if i know these details please.

By ur discussion i understand coreconsultant is a tool which automatically generates an encrypted kinda code.

Any way thanks for the discussion.
 

Re: coreConsultant question?

Raghu,
Why not use Google to look for such general doubts - it is for your benefit - will get answers much quickly. Here is what my google search revealed:

**broken link removed**

HTH
Ajeetha
--
www.noveldv.com
Interested in expert PSL/SVA training? Visit www.noveldv.com/cvc.html
 

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