[Moved]:How can I evaluate on-chip bypass-capacitor's capacity based on the topology?

The transmitter I designed has been showing lots of jitter.I think there's something wrong with the layout topology.Pad of the power supply is a little far away from the circuits by connection through thin metals,thus producing a resistance as large as 2 ohms,which would lead to IR-Drop.It will not do much harm if bypass-capacitor for the power is large enough to compensate for that.But I feel since the mesh-structure capacitor(green part in the pic) mostly sprawls over the chip distant from the current path, its capacity on providing the transients must have been weakened than if it is "properly" placed.I really want to know if it can be turned to some actual,smaller-value one so I can see its effect through simulation on Spectre?

Re: How can I evaluate on-chip bypass-capacitor's capacity based on the topology?

If I were you I would use off-chip decoupling capacitor in such sensitive circuits.

Re: How can I evaluate on-chip bypass-capacitor's capacity based on the topology?

BigBoss said:

If I were you I would use off-chip decoupling capacitor in such sensitive circuits.

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I use off-chip capacitor as well on the PCB.Is there any problem with this on-chip one?

Re: How can I evaluate on-chip bypass-capacitor's capacity based on the topology?

xiangx93 said:

The transmitter I designed has been showing lots of jitter.I think there's something wrong with the layout topology.Pad of the power supply is a little far away from the circuits by connection through thin metals,thus producing a resistance as large as 2 ohms,which would lead to IR-Drop.It will not do much harm if bypass-capacitor for the power is large enough to compensate for that.But I feel since the mesh-structure capacitor(green part in the pic) mostly sprawls over the chip distant from the current path, its capacity on providing the transients must have been weakened than if it is "properly" placed.I really want to know if it can be turned to some actual,smaller-value one so I can see its effect through simulation on Spectre?
View attachment 137311

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It also seems to me that the inductance is large because of the loop,but how can I estimate it?

Re: How can I evaluate on-chip bypass-capacitor's capacity based on the topology?

xiangx93 said:

I use off-chip capacitor as well on the PCB.Is there any problem with this on-chip one?

Click to expand...

It's too large and it will probably act as an antenna and connection line is too long in terms of resistance and inductance.It will not serve well as a good decoupling capacitor due to these parasitics.

Re: How can I evaluate on-chip bypass-capacitor's capacity based on the topology?

xiangx93 said:

It also seems to me that the inductance is large because of the loop,but how can I estimate it?

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For a (very) raw estimation you could e.g. use this Wire Self Inductance Calculator - the fact that your wire runs over SiO₂ doesn't change a lot. It's self-inductance value will constitute of the order of 10..100 nH . No: 10..100 pH , sorry!

Do you have access to any XRC extraction tool (Assura, Calibre)? With such a tool you can extract point-to-point (node-to-node) RLC values info.