RC6 Encryption Algorithm / round level inversion in VHDL

Hi,

Would you please tell me how to write the following questions' code in
VHDL if you know and understand RC6 Encryption Algorithm / round level
Inversion?I will appreciate your help.Thank you.

Q1.
•Input

•128-bit plain text
• stored in four 32-bit registers A,B,C,D
•round keys S[0],S[1],S[2],...,S[43]

•Output

•128-bit cipher text
•stored in A,B,C,D

Q2.The following RC6 Algorithm should not be a VHDL code
would you please help to change it into a VHDL code if you know?
It should follow Q1.Thank you.

B = B + S[0]; D = D + S[1] --pre whitening
for i = 1 to 20 do --whitening
{

t = (B*(2B+1)) <<< 5;
u = (D*(2D+1) <<<5;
A = ((A xor t) <<<u) + S[2i];
C = ((C xor u) <<<t) + S[2i +1];
(A, B, C, D) = (B, C, D, A)
}
A = A + S[2r+2]; C = C + S[2r+3]; --post whitening

Re: 2 questions

Hi,

Does anybody know those two questions?Would you please
help to answer them in VHDL ?I will appreciate you.Thank you.

Added after 2 minutes:

Hi,

Does anybody know those two questions?Would you please
help to answer them in VHDL ?I will appreciate you.Thank you.