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MOSFET - Gate to Source Voltage Clamping

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TXRX

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Hi,

I have a circuit that shift voltage level of +3.3VDC pulse of 50uSec to +28VDC , The VGS maximum of the MOSFET is 20VDC, the 47uF CAPACITOR give the current to 95ohm load, so i want to protect the MOSFET, is a the connection of the zener correct ? The zener of +15VDC, Is voltage margin of 5VDC enough ?

Regards,

Doron
 

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When the transistor turns on then it and the 15V zener diode will be destroyed by the very high unlimited current. Use an additional level-shifter transistor so that the gate-source is limited to about 10V.
 

You can also connect another resistor (say 10kΩ) in series with the collector of the NPN transistor.
That will limit the zener current.
The disadvantage is that it will also give an RC slow down of the MOSFET turn-on, depending upon its gate charge and the resistor value.
 

A few options to consider -

- for turnon, consider emitter-denegerating the NPN
(say, with 100 ohms - making 3.3V drive produce a
bit under 30mA DC). Could supplement with a shunt
cap for a high peak turnon current but still a limited
steady state, which the zener could tolerate. But if
you ratio the emitter resistor and the FET gate shunt
resistor you can also set the FET Vgs that way and
make the zener only a backstop.

Turnoff is the weak point of the discrete lashup. A
better drive scheme might be a Class B BJT pair that
the low side NPN, drives the bases of. And zener
clamp that base node for much more "leverage".
 

Hi,

Why not simply use a high side switch?
All you need is inside one chip.

Klaus
 

Hi Crutschow,

Where to locate this resistor : between collector to zener or zener to gate ?

Thanks,

Doron

- - - Updated - - -

Hi dick_freebird,

If i put a resistor emitter to reduce the voltage to the gate, why can i remove the zener ?

It is more important the rise time of the pulse at output than fall time.

Thanks,

Doron

Thanks,

Doron
 
Last edited:

Hi Crutschow,

Where to locate this resistor : between collector to zener or zener to gate ?
Between the collector and zener/gate.

It wouldn't clamp the gate-source voltage if you put the resistor between the zener and the gate.
 

Emitter resistor limits the collector current and then the
G-S FET resistor can be expected to develop a fixed (-ish)
voltage. Of course there is variability w/ low side logic
signal level, BJT temp and so on.

If you wanted to peak up the current with the suggested
capacitor then there would be a gate overshoot that the
zener would have to eat once per cycle, but only after
the FET has been fully driven. The C value and the zener
pulse power limits would have to be consistent.

A commercial high side switch / load switch is of course
going to be simpler, probably cheaper, as has been
suggested. There may also be driver ICs meant for
high side switch FET gate drive, including gate
voltage regulation along with level shifting. Be sure
you pick one suited to static operation if you intend
a low switching rate, avoid bootstrap style ones in
such cases.


Hi dick_freebird,

If i put a resistor emitter to reduce the voltage to the gate, why can i remove the zener ?

It is more important the rise time of the pulse at output than fall time.

Thanks,

Doron
 

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