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  1. #1
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    when the "signal will update" in fpga

    hello every one...

    I am working in xilinx ...artix 15t fpga . In this i need to know , in below two process what value will there in "addr" varible in first rising edge ....kindly reply any one ...both clk is same


    initi...addr<=0;
    -----Process-1------

    rising edge of clk

    temp<=ram(addr);

    end process

    -----Process-2------

    rising edge of clk

    addr<=addr+1;

    end process

    •   Alt9th March 2017, 06:08

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  2. #2
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    Re: when the "signal will update" in fpga

    Hi,

    Because the values are updated after the rising clock...
    At the first rising clock addr=0, ...then after a little delay it is updated to 1
    At the next rising clock addr=1

    Klaus



    •   Alt9th March 2017, 08:18

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  3. #3
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    Re: when the "signal will update" in fpga

    thanks for reply ...my main doubt is ,In the process-1 rising edge after i will do some operation after that only i am using "addr " ..at the same time i will update the "addr" content in another process-2, so it will affect or not ....in detail below ..


    initi...addr<=0;
    -----Process-1------

    rising edge of clk
    a<=a+1;
    b<=b+3;
    c<=c+1;
    d<=d+3;
    temp<=ram(addr);

    end process

    -----Process-2------

    rising edge of clk

    addr<=addr+1;

    end process



    •   Alt9th March 2017, 10:35

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    Re: when the "signal will update" in fpga

    Hi,

    process1 and proces2 are running at the same time.

    --> read post#2, I think it is clearely answered.

    Klaus


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  5. #5
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    Re: when the "signal will update" in fpga

    VHDL is not a programming language - it is meant to model hardware.
    The way signals work in VHDL is that the are scheduled to update at some future point in time. if no time is specified (with an after clause) then it will be updated at the end of the current delta cycle. All processes trigged on the rising edge of the clock will process in 0 time in the same delta cycle, so nothing will have updated yet. All of your assignments, a,b,c,d and temp will be assigned at the end of the current delta.


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