nastas
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Hi all.
I have crazy idea, try to use eg8010 as a grid tie invertor's sinusoid generator. There are many cheap boards with eg8010+ ir2110, and DYI boards for offgrid inverters.
There is two aspects.
1. Voltage level - no problem (use refernce setup DAC or UART managment)
2. Phase with target net, right, there is a problem but lets imagine - this chip have at least 255 stages of frequensy setup for 0-100Hz range, it gives a resolution something about 0.39 Hz
(49.8Hz for 127 and 50.19Hz for 128). Yep resolution is not the best, but even with this two values (for example 127/128) we can keep synchronization in quite good range (its about 0.5% drift, I think zero crossing detector will give worst accuracy in real conditions).
So algo to control phase drift is next: we measure time difference between zero crossing on line and rising edge on eg8010 unipolar key. If delay positive we use 127 value, other way 128. But its faster to use for this purpose DAC instead of UART (plus I hope with DAC eg8010 will have more resoltion - it should be tested).
I've tried such algo on stm32+IRAMX16 (when it was alive ).
The only one thing make me worry - how fast eg8010 apply changes (on this duty cicle, on next half of waveform, on next period...)
I would like to heards your opinions, advises and so on, please.
PS. Sorry for my english (its not my native).
I have crazy idea, try to use eg8010 as a grid tie invertor's sinusoid generator. There are many cheap boards with eg8010+ ir2110, and DYI boards for offgrid inverters.
There is two aspects.
1. Voltage level - no problem (use refernce setup DAC or UART managment)
2. Phase with target net, right, there is a problem but lets imagine - this chip have at least 255 stages of frequensy setup for 0-100Hz range, it gives a resolution something about 0.39 Hz
(49.8Hz for 127 and 50.19Hz for 128). Yep resolution is not the best, but even with this two values (for example 127/128) we can keep synchronization in quite good range (its about 0.5% drift, I think zero crossing detector will give worst accuracy in real conditions).
So algo to control phase drift is next: we measure time difference between zero crossing on line and rising edge on eg8010 unipolar key. If delay positive we use 127 value, other way 128. But its faster to use for this purpose DAC instead of UART (plus I hope with DAC eg8010 will have more resoltion - it should be tested).
I've tried such algo on stm32+IRAMX16 (when it was alive ).
The only one thing make me worry - how fast eg8010 apply changes (on this duty cicle, on next half of waveform, on next period...)
I would like to heards your opinions, advises and so on, please.
PS. Sorry for my english (its not my native).