NikosTS
Advanced Member level 4
Hello all,
I want to design a model of a MASH 1-1-1 ( 3rd order sigma delta modulator) in Verilog A.
I am new to VerilogA and i am having trouble designing it, especially the delays of the error cancellation network.
Any help will be greatly appreciated.
Thank you in advance
I want to design a model of a MASH 1-1-1 ( 3rd order sigma delta modulator) in Verilog A.
I am new to VerilogA and i am having trouble designing it, especially the delays of the error cancellation network.
Any help will be greatly appreciated.
Thank you in advance