ashrafsazid
Advanced Member level 4
Hi,
I am hereby posting to clear my confusion about SC implementation. From the block diagram of Sigma-Delta modulator we see a feedback from the comparator goes back to have the difference with input.
Now, If I implement the block in SC level, then what I need to do? This below figure says I need to connect (Vref or -Vref on each 2nd phase (ϕ2).
But my confusion is, from the basics of switched-capacitor circuits we will have two phase. one for input sampling (ϕ1) and other one for charge transferring (ϕ2). Now, as we sample the input, the second phase is needed to transfer the charge to feedback Cap of the integrator. Hence the sampling cap's bottom plate should be grounded, but here on that phase it is connected to either +Vref or -Vref. {confusion 1}
As the block diagram (Fig a.) suggest, the comparator output (feedback) will be connected to input summer (negative), So, is it not okay to take an wire from comparator output and connect it to the point where Vref's are connected? (In Fig. 3.1). {confusion 2}
This Figures are taken from YGMS, Sensen book of Delta-Sigma ADC design. They said during phase2 (ϕ2) either Vref or -Vref will be connected. But which will be connected based on which condition ? {confusion 3}
Last Confusion is about Incremental Delta Sigma ADC, where Vref is subtracted from input if comparator value >0. That means only for this condition Vref will be connected for feedback otherwise the input voltage will be sampled and charge will be tranferred. So, In this case is it also matches with Fig. 3.1 where Vref is always connected during ϕ2? {confusion 4}
Please let help me clear this confusion. It will be a great help. Thanks.
I am hereby posting to clear my confusion about SC implementation. From the block diagram of Sigma-Delta modulator we see a feedback from the comparator goes back to have the difference with input.
Now, If I implement the block in SC level, then what I need to do? This below figure says I need to connect (Vref or -Vref on each 2nd phase (ϕ2).
But my confusion is, from the basics of switched-capacitor circuits we will have two phase. one for input sampling (ϕ1) and other one for charge transferring (ϕ2). Now, as we sample the input, the second phase is needed to transfer the charge to feedback Cap of the integrator. Hence the sampling cap's bottom plate should be grounded, but here on that phase it is connected to either +Vref or -Vref. {confusion 1}
As the block diagram (Fig a.) suggest, the comparator output (feedback) will be connected to input summer (negative), So, is it not okay to take an wire from comparator output and connect it to the point where Vref's are connected? (In Fig. 3.1). {confusion 2}
This Figures are taken from YGMS, Sensen book of Delta-Sigma ADC design. They said during phase2 (ϕ2) either Vref or -Vref will be connected. But which will be connected based on which condition ? {confusion 3}
Last Confusion is about Incremental Delta Sigma ADC, where Vref is subtracted from input if comparator value >0. That means only for this condition Vref will be connected for feedback otherwise the input voltage will be sampled and charge will be tranferred. So, In this case is it also matches with Fig. 3.1 where Vref is always connected during ϕ2? {confusion 4}
Please let help me clear this confusion. It will be a great help. Thanks.
